4 outputs obtained from a DA converter decode multi-channel switching circuit

4 outputs obtained from a DA converter decode multi-channel switching circuit

The function of the circuit

When multi-channel analog inputs connected switcher, multi-channel AD converter, such as channel scan speed is relatively slow, mostly with multiple AD conversion circuitry. The circuit on the contrary, is put into a DA converter 4 outputs form four equivalent DA converter, which is used to allow the slow conversion speed DA output circuits, the cost can be reduced.

Circuit works

Work on the principle of the circuit, just think about the DA converter output is terminated with a 4 contact rotary switch, and high-speed rotating shaft, it is easy to understand.

IC2 2-4 decoder which according to the input data "L", "L" is YO; "L", "H" for Y1; "H", "L" for Y2; "H", "H" Y3 for combinations, so that the two data corresponding output Y becomes "L" level, driving four-way analog switch IC.

When the input of IC2 G "H" level, since all Y outputs are "H", this state can be maintained as a signal sampling or. Output order data is as follows:

Assuming the value of the DA converter circuit by double lock, the input to channel 1, first to make A, B for the two-input "L", "L", the switch S1 is closed, the channel 1 is selected.

Next, as a signal input is sampled, the desired pulse width to ensure that the capacitor C1 to be fully charged, the output from the DA in order to zero to + 10V when charging C1 accuracy within 0.1%, the pulse width PW must meet the requirements of the following formulas: PW≥1000C1.R1, R1 = 1K, C2 = 0.01UF, PW = 10MS. Thus, scanning four output channels requires a minimum 40MS.

If you let A = "H", B = "L", the selector switch S2 can make the DA data input to Channel 2.Finally, in order Channel 3, Channel 4, and repeat the process.

The voltage produced when the capacitor is charged, the bias current is high input impedance, low input amplifier OP held until the next sampling cycle. Each output stage offset adjustment circuit is not connected, the offset can be adjusted by the next level of the circuit as needed.

Optional components

Capacitor C1 ~ C4 are holding capacitor voltage, high insulation resistance should be selected product, the choice of film capacitors. And do not pay attention to the capacitor near the power cord. Wired logic circuits should be so, if there is capacitive coupling, because the logic signal is unipolar, so the capacitor will be positive charge, equivalent to happen bias drift. There are four combinations of OP amplifier selection of LT084, if FET input can also choose other types of OP amplifier.

C5 ~ C8 to stabilize the feedback circuit which is not strictly required capacity size.